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説明
ETC構成
EDS/ TESTOEMモデルの説明
Catalyst is a test system that delivers full test coverage for a wide range of semiconductor applications, including xDSL, wireless/RF, networking, and power management. It was the first SOC test system and is now the world’s leading SOC test system with over 1600 systems installed at customers around the world. The Catalyst family extends its range to more pins and Gigahertz speed with the Teradyne Tiger™ test system. It features fully integrated analog and digital instrumentation, mixed-signal/SOC digital with data rates to 400 Mbps, full spectrum AC instrumentation, Background-DSP™ processing, IMAGE™ programming system with interactive debug displays and complete test engineering tools for device characterization, and a system architecture that accelerates test development and high-volume production for ICs with complex digital, embedded memory, and high-performance analog components.ドキュメント
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同様のリスト
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TERADYNE
CATALYST
カテゴリ
Final Test
最終検証： 60日以上前
主なアイテムの詳細
状態：
Used
稼働ステータス:
不明
製品ID：
75690
ウェーハサイズ：
12"/300mm
ヴィンテージ：
1998
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説明
ETC構成
EDS/ TESTOEMモデルの説明
Catalyst is a test system that delivers full test coverage for a wide range of semiconductor applications, including xDSL, wireless/RF, networking, and power management. It was the first SOC test system and is now the world’s leading SOC test system with over 1600 systems installed at customers around the world. The Catalyst family extends its range to more pins and Gigahertz speed with the Teradyne Tiger™ test system. It features fully integrated analog and digital instrumentation, mixed-signal/SOC digital with data rates to 400 Mbps, full spectrum AC instrumentation, Background-DSP™ processing, IMAGE™ programming system with interactive debug displays and complete test engineering tools for device characterization, and a system architecture that accelerates test development and high-volume production for ICs with complex digital, embedded memory, and high-performance analog components.ドキュメント
ドキュメントなし