メインコンテンツにスキップ
6" Fab For Sale from Moov - Click Here to Learn More
6" Fab For Sale from Moov - Click Here to Learn More
Moov logo

6" Fab For Sale from Moov - Click Here to Learn More
Moov Icon
TERADYNE J750
    説明
    Vintage: 1999-2000 TERA1 8 slot body
    構成
    2x HSD100 - 128 ch 2x DPS - 16 DPS
    OEMモデルの説明
    The J750 Family of semiconductor test systems by Teradyne is a compact and economical solution that delivers high-efficiency parallel test in a small system footprint. The J750 Family is available in 512 pin, 1024 pin, and J750k configurations, each with its own set of features and capabilities. The 512 pin and 1024 pin configurations both have a clock speed of 100 MHz, while the J750k has a clock speed of 66 MHz / 33 MHz. All configurations come with IG-XL software built on Windows and Microsoft Excel, and offer various options for memory test, converter test, mixed signal test, RFID, scan, APMU channels, high voltage drivers, and device power supplies.
    ドキュメント

    ドキュメントなし

    TERADYNE

    J750

    verified-listing-icon

    検証済み

    カテゴリ
    Final Test

    最終検証: 60日以上前

    主なアイテムの詳細

    状態:

    Used


    稼働ステータス:

    不明


    製品ID:

    109735


    ウェーハサイズ:

    不明


    ヴィンテージ:

    不明


    Have Additional Questions?
    Logistics Support
    Available
    Money Back Guarantee
    Available
    Transaction Insured by Moov
    Available
    Refurbishment Services
    Available
    同様のリスト
    すべて表示
    TERADYNE J750

    TERADYNE

    J750

    Final Test
    ヴィンテージ: 2002状態: 中古
    最終確認60日以上前

    TERADYNE

    J750

    verified-listing-icon
    検証済み
    カテゴリ
    Final Test
    最終検証: 60日以上前
    listing-photo-510f2b80b5b949b9852359782a3ca75c-https://media-moov-co.s3.us-west-1.amazonaws.com/user_media/listingPhoto/2138/510f2b80b5b949b9852359782a3ca75c/7dab9571997940a4be6a71f9747458fd_teradynej7509920003page2image0002_mw.jpg
    listing-photo-510f2b80b5b949b9852359782a3ca75c-https://media-moov-co.s3.us-west-1.amazonaws.com/user_media/listingPhoto/2138/510f2b80b5b949b9852359782a3ca75c/43146da2390843b4813832d64493a96f_teradynej7509920003page1image0002_mw.jpg
    listing-photo-510f2b80b5b949b9852359782a3ca75c-https://media-moov-co.s3.us-west-1.amazonaws.com/user_media/listingPhoto/2138/510f2b80b5b949b9852359782a3ca75c/f25becbc5a0442eebf2897e823299edb_teradynej7509920003page3image0002_mw.jpg
    listing-photo-510f2b80b5b949b9852359782a3ca75c-https://media-moov-co.s3.us-west-1.amazonaws.com/user_media/listingPhoto/2138/510f2b80b5b949b9852359782a3ca75c/18bdd123a2a24006a675644c7a364e69_teradynej7509920003page2image0003_mw.jpg
    主なアイテムの詳細

    状態:

    Used


    稼働ステータス:

    不明


    製品ID:

    109735


    ウェーハサイズ:

    不明


    ヴィンテージ:

    不明


    Have Additional Questions?
    Logistics Support
    Available
    Money Back Guarantee
    Available
    Transaction Insured by Moov
    Available
    Refurbishment Services
    Available
    説明
    Vintage: 1999-2000 TERA1 8 slot body
    構成
    2x HSD100 - 128 ch 2x DPS - 16 DPS
    OEMモデルの説明
    The J750 Family of semiconductor test systems by Teradyne is a compact and economical solution that delivers high-efficiency parallel test in a small system footprint. The J750 Family is available in 512 pin, 1024 pin, and J750k configurations, each with its own set of features and capabilities. The 512 pin and 1024 pin configurations both have a clock speed of 100 MHz, while the J750k has a clock speed of 66 MHz / 33 MHz. All configurations come with IG-XL software built on Windows and Microsoft Excel, and offer various options for memory test, converter test, mixed signal test, RFID, scan, APMU channels, high voltage drivers, and device power supplies.
    ドキュメント

    ドキュメントなし

    同様のリスト
    すべて表示
    TERADYNE J750

    TERADYNE

    J750

    Final Testヴィンテージ: 2002状態: 中古最終検証:60日以上前
    TERADYNE J750

    TERADYNE

    J750

    Final Testヴィンテージ: 0状態: 中古最終検証:60日以上前
    TERADYNE J750

    TERADYNE

    J750

    Final Testヴィンテージ: 0状態: 中古最終検証:60日以上前