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CUB*1，DPS*2，channel board*7 APMU*1OEMモデルの説明
The J750 Family of semiconductor test systems by Teradyne is a compact and economical solution that delivers high-efficiency parallel test in a small system footprint. The J750 Family is available in 512 pin, 1024 pin, and J750k configurations, each with its own set of features and capabilities. The 512 pin and 1024 pin configurations both have a clock speed of 100 MHz, while the J750k has a clock speed of 66 MHz / 33 MHz. All configurations come with IG-XL software built on Windows and Microsoft Excel, and offer various options for memory test, converter test, mixed signal test, RFID, scan, APMU channels, high voltage drivers, and device power supplies.ドキュメント
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TERADYNE
J750
カテゴリ
Final Test
最終検証： 60日以上前
主なアイテムの詳細
状態：
Used
稼働ステータス:
不明
製品ID：
41120
ウェーハサイズ：
不明
ヴィンテージ：
不明
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説明
説明なし構成
CUB*1，DPS*2，channel board*7 APMU*1OEMモデルの説明
The J750 Family of semiconductor test systems by Teradyne is a compact and economical solution that delivers high-efficiency parallel test in a small system footprint. The J750 Family is available in 512 pin, 1024 pin, and J750k configurations, each with its own set of features and capabilities. The 512 pin and 1024 pin configurations both have a clock speed of 100 MHz, while the J750k has a clock speed of 66 MHz / 33 MHz. All configurations come with IG-XL software built on Windows and Microsoft Excel, and offer various options for memory test, converter test, mixed signal test, RFID, scan, APMU channels, high voltage drivers, and device power supplies.ドキュメント
ドキュメントなし